Original article published in Danish: http://ipaper.ipapercms.dk/TechMedia/AktuelElektronik/2018/1/?page=6
EDA SOFTWARE PROMISES FOR ANALOG CHIP DESIGN
By automating the dimensions of the transistors in analog circuits, the French startup Intento Design makes it easier and faster for Analog Designers to achieve a more efficient design with better performance.
-“With our tool, Analog Designers can reduce design time by up to 60 percent while examining more alternative solutions to their design”, explained Ramy Iskander. Raouf Khalil shows here the demonstration of the company's novel design tool solution.
by Jorgen Sarlvit-Larsen, (CDNLive 2017, Munich)
Analog circuits constitute an important part of integrated circuits which are used to communicate with the world. The analog part of these chips is necessary to interact with the physical world and send data to other ICs inside an electronic system. With the widespread use of wireless technology and mobile communications, the analog part of the chip design increases in many of today's ICs. For example, among other things, Internet-of-things (IoT) technology is implemented using countless wireless sensors everywhere in society, including consumer electronics, automotive, smart cities, industrial and medical products, military equipment, automation of private homes etc.
This trend creates a need for further automation of analog design aligned with digital design. But while digital design can be fully automated with the use of common EDA tools, analog design has been more difficult to automate. This is due, among other things, to a significant difference between the two circuit types. In analog electronics the signal is processed as a continuous process in a given operating region, whereas digital electronics works with an on-/off-function like a switch. For this reason, analog circuit design remains something of an art form. And in many cases, it is a manual process that takes an increasingly large part of the total development time of integrated circuits.
Raouf Khalil demonstrated the ID-Xplore tool at CDNLive Conference in Munich and shows here that the transistor size in ID-Xplore can be back-annotated to the schematic drawing program.
High quality difference
The lack of automation of the analog design process also reflects on analog circuit tests which are not developed to the same degree as digital tests. Among other things, it may be the reason for the large quality difference that exists between the digital and analog parts in today's System-on-chip (SoC) designs. For example, the majority of the field errors in automotive ICs are belonging from the analog part of the chip. The reason why automation of the analog part of the chip cannot match the digital part is because of the development within semiconductor process technology. It is largely optimized for digital engineering and leaves, to some extent, the analog part of the circuit in the lurch. For example, process variations in chip manufacturing may not matter as much in digital circuits, but it can be a big challenge in analog circuits. The reduction of the transistors could be an advantage for the digital part, but can be a distinct disadvantage for the analog part. The latter will therefore not have the same benefit from the ever smaller semiconductor geometries, even though today designs with FinFET transistors in 16nm technologies and below are combining both digital and analog IPs in the same technology on the same chip.
When the analog design gradually becomes bottleneck in the IC design project, the EDA (Electronic Design Automation) industry will of course try to develop design methods and associated software tools so it will be possible to make the analog design process more automatic. For example, the EDA software tool, ID-Xplore, by the French startup Intento Design, automates the dimensioning of the individual transistors and analog circuits. - “With our tool, you can reduce analog chip designers design-time by up to 60 percent while examining several alternative solutions of their design”, explained Ramy Iskander, the CEO and co-founder of Intento Design (a Cadence partner), at the Cadence Annual Customer Seminar, CDNLive 2017, which was held mid-May, in Munich. Traditional analog and mixed-signal design approaches require that chip designers manually analyze and dimension analog circuits by using transistor models and technology parameters from the semiconductor process. They then determine an optimal DC point, and a first estimation of the transistor sizes and then iterate by using simulation. -The problem with this method is that the transistor sizes are often determined from a single estimation because there is rarely time to make several estimations and thus, to examine the design more thoroughly. However, in advanced semiconductor technologies, even small variations in the production process can affect analog circuits and thus change accidentally the performance of the circuit, pointed out Intento’s Head of analog-design, Raouf Khalil. This sizing is now automated in ID-Xplore. Fast and accurate, the software allows you to get an overview of the analog performance from a variety of size estimations. With ID-Xplore, we determine the transistor size only after a full study of the design.
Graph Based Tool
ID-Xplore uses standard transistor models and complex process technology to explore the design space, and, by doing this early in the development cycle, achieves a more effective design with better performance, Intento points out. The graph-based tool is technology independent and can work with standard schematic tools. For example, it can be used as a plugin and fully integrates in Virtuoso XL Tools and in ADE XL from Cadence. Additionally, a significant productivity gain gives ID-Xplore the opportunity to “health check” designs to avoids oversized transistors. Thanks to the tool's independence from technology, you can migrate an analog IP (Intellectual Property) block from a technology to another one. In just a few clicks, analog designers see the behaviour and performance of the circuit in the new process technology. The construction of a class AB differential RF Amplifier provides an example of the productivity improvement that can be obtained by using ID-Xplore: the design included 75 transistors in 180nm technology, and using the automatic sizing, enhance speed performance by 30 percent compared to a handmade design, was obtained and in addition the transistor size the area were significantly reduced. Also, in half a day the technology independent graph based version of the circuit was created, so the design now could easily be migrated to other technologies.
-With ID-Xplore we have automated an important part of the analog design process. When using the the tool, chip designers can enter desired parameters up to even the most complex analog functions and quickly optimize the design. It accelerates the design process and allows you to get new products quickly on the market, concludes Ramy Iskander.