Designing Analog without ID-Substrate Means Taking Unnecessary and Costly Risks…
ID-Substrate is a sign-off and verification tool that uniquely captures and simulates all substrate parasitic circuits with SPICE accuracy.
ID-Substrate detects parasitic effects that are normally found after fabrication. It is the very last step before the tapeout – a ‘sanity-check’ which gives the designer a clear insight into potential danger areas in the substrate and, if deemed necessary, a chance to go back to the layout or even schematic and eliminate costly substrate failure risks before the fabrication – while the cost is still insignificant.
With ID-Substrate, one can rest assured that the design sent to tapeout will have no reliability issues nor catastrophic failures.
ID-Substrate thoroughly checks all the layers of the substrate and gives the result in minutes: unlike existing tools, which use inefficient finite-element analysis techniques, ID-Substrate operates at a fraction of the time, providing the right information to prevent substrate coupling issues and catastrophic latch-up failures in Smart Power ICs.
ID-Substrate can also be used to verify if further area reduction is possible without inducing reliability risks.
- Accurately simulate local minority, majority and total substrate-currents
- Quickly show any high-risk substrate current “hot spots”
- Verify the effectiveness of your guard-ring isolation strategies
- Simulate substrate + schematic and prevent catastrophic latch-up failure
- Easily assess block-level or system-level analog schematic circuits
- Adaptive meshing ensures fast operations and accurate modelling
- Controlled regional meshing for precise analysis, at the best speed
- Operates with the Cadence Analog Design environment
- Simulates substrate with the extracted schematic, for complete parasitic capture