Highly differentiated analog circuit design depends on the symbiotic relationship between talented designers and innovative analog design tools.
Intento Design provides the innovative tool in the form of ID-Xplore; however, it is the knowledge and creativity of our client’s designers that help uncover the full potential of ID-Xplore and let it shine.
ID-Xplore integrates fully into standard tools, allowing analog designers to work directly with electrical parame- ters for both design and technology migration – and with exceptional level of control in design exploration. There is no need to enter initial sizing parameter unless specifi- cally requested. Our patented electrical parameters graph operations enable analog designers to keep their focus on schematic innovation, while using the level of automation previously available only in digital design tool flows.
A typical design flow requires going through “manual” sizing and biasing with lots of time consuming iterations. This empiric approach results in days of work before getting a correctly sized schematic. Only after accessing the technology PDK through ADE XL simulation can the design trade-offs be fully assessed. As semiconductor technologies have advanced, EDA innovation for DC bias and sizing has not kept pace.
Today, Intento Design ID-Xplore tool uses graph-based disruptive innovation to provide rapid, specification driven DC bias and transistor sizing. Using Cadence Virtuoso Schematic Composer Constraint Editor, design constraints plus circuit topology are used to generate a graph for fast design space exploration in any technology. ID-Xplore provides design curves showing the performance capabilities and design trade-offs within the technology and the design constraints.
The patented graph approach incorporates full technology complexity using industry standard simulators at transistor level. Specification and technology constraints drive the design exploration, ensuring a correct-by-construction DC bias operating point.
Analog Designers are empowered with fast exploration capabilities in their targeted design space to get a correct and highly performant sized schematic in minutes.
ID-Xplore is not just a circuit optimizer. ID-Xplore is an exploration tool that fits into an industry-wide automation gap between the electrical parameter description of the transistor inversion and the sizing. ID-Xplore follows designer instructions to explore the impacts of transistor inversion on circuit performance.
Key differentiators of ID-Xplore include:
Opposite to ID-X, Circuit Optimizers use preset optimization algorithms based on numerical simulations; decisions are made inside a “black box” based on standardized criteria; it is necessary to enter a good initial estimate. The solutions are applied within a restricted range of sizing, while design centering uses array of local and global settings, including corners.