Using ID-Substrate we can effectively detect the areas in the substrate where reliability is at risk.
With the netlist of parasitics extracted by ID-Substrate, the designer can back annotate to the original netlist or resimulate the schematic, taking into account the substrate parasitics, and visualize the areas of potential ‘hot-spots’ for post-fabrication latch-up risks.
Substrate failures were an invisible and inevitable risk that was impossible to detect (and therefore prevent) before fabrication; with ID-Substrate, we can for the first time accurately and yet quickly predict and prevent catastrophic failures caused by substrate coupling on latch-up.
Unlike finite element modelling techniques, where simulations last days, ID-Substrate simulations give exceptionally accurate results in literally seconds. We use circuit based modelling, which combined with adaptive meshing algorithms optimizes the number of elements, producing results quickly without convergence issues or accuracy losses.
ID-Substrate operates within the Cadence Analog Design environment. The following images show comparison in speed and accuracy between current commercial numerical substrate modelling and ID-Substrate.
